The present invention relates to a surfacing process for stabilizing semiconductor wafers, or slices, of the type in which a glass coating is deposited on a surface of the semiconductor slice at least in the region of the exposed edges of the pn-junctions formed in the slice. This coating produces an effect generally referred to as passivation.
As is well known in the semiconductor industry, semiconductor slices having a sequence of layers of alternately different conductivity types, are provided at the surface thereof, at least in the region of edges of the pn-junctions, with a protective varnish coating which serves to stabilize the reverse, or blocking, characteristics of the resulting semiconductor devices. Preferably, this protective varnish coating consists of organic materials and prevents the capture of unwanted impurities on the semiconductor surface from the surrounding atmosphere, as well as the deleterious effects of existing impurities.
To develop this stabilizing effect, it is necessary to subject commonly known protective varnishes to a heat treatment after they have been applied to the surface of the semiconductor.
Such surface treatment has significant disadvantages, however. If small-surface devices are obtained by cutting a pretreated parent semiconductor slice into pieces, the contact electrodes of the devices must be fabricated because of the required processing temperatures prior to covering the particular surface regions of the devices with the stabilizing coating. This process, because it uses protective varnishes for passivation purposes, calls for a large number of additional steps which can not be economically justified, particularly for miniature, i.e. microprocessing, devices.
Furthermore, during the fabrication of small and medium-power semiconductor devices which are to be encapsulated in plastic, there is frequently an unwanted long-term reaction between the material of the protective varnish coating and the encapsulation material, resulting in impairment of the stability of the operating characteristics of the semiconductor devices.
Therefore, an urgent need has been felt for a type of passivation which will eliminate these problems.
To accomplish these objectives, it is common practice to passivate semiconductor surfaces with the aid of a layer of vitreous material, as exemplified in U.S. Pat. No. 3,632,434. To attain this result, an appropriate surface of the semiconductor slice is coated with a mixture containing a glass, preferably ground powder form, and a liquid, e.g. organic, component as a binder for the glass powder. After applying this mixture, e.g. by spreading or spraying, the slice is heated in an oxygen atmosphere to a temperature below the fusion temperature of the glass. In this way, there is formed on the semiconductor surface an oxide layer of the semiconductor material, while the organic component is burned off and removed from the mixture. The glass is left remaining on the semiconductor surface in the form of a compacted layer adhering to the semiconductor oxide layer.
The slice is then heated in an oxygen-free atmosphere, so that the glass is melted and fused to the surface to form a firmly adhering and homogeneous coating. Glasses containing lead oxide, silicon dioxide and aluminum oxide are commonly employed.
In this known method, passivation of the semiconductor device, obtained by cutting a parent slice into pieces, may be effected before the contact electrodes are mounted. However, it has the drawback that, due to differences in the thermal coefficients of expansion of the glasses being employed and of the semiconductor material within the semiconductor device operating temperature range of 150.degree. to 200.degree. C. currently desired, and due to variations of the surface loads upon putting the devices into operation, cracks occur in the glass coating and, thereby, unwanted reductions occur in the critical field strength of the surface.
This detrimental effect is found particularly in glass coatings on large-area wafers which are to have a high current-carrying capability and in fairly thick coatings on wafers which are to have a high reverse-voltage, or blocking, capability. Consequently, it has heretofore not been possible to make glass coatings with a thickness in excess of 30.mu., so that the blocking capability of glass-passivated semiconductor devices, in view of the known interrelation that a layer thickness of 10-15.mu. assures a voltage-carrying capability of about 300 V, does not in all instances attain the values made possible by protective-varnish passivation. For this reason, present-day glass-passivated semiconductor devices, and more particularly medium and high-power devices, can only be employed for operating temperatures up to about 115.degree. to 125.degree. C.